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ğault tolerant processing, memory, and I/O concepts.

Mission critical embedded systems architecture and key design elements.

ĝesign trade-offs with different real-time hardware architectures including single core, multi-core, hybrid-FPGA, GP-GPU, and DSP systems, with emphasis on multi-core.

Thorough understanding of hardware/software device interfaces and resource view for hardware abstraction layers (HAL, BSP).Methods of verification to determine ability to meet mission critical as well as soft real-time requirements will be learned so that the learner can properly assess risk, reliability and impact of failure in real-time systems.Īt the end of this course learners will be able to apply an architectural style (cyclic executive, RTOS, or embedded Linux) to more detailed design of a mission critical system, a soft real-time system, or a mixed hard and soft real-time system, including:

This will be achieved not only by study of design methods and patterns for mission critical systems, but also through implementation of soft real-time systems and comparison to hard real-time.

Upon completion of this course the learner will know the difference between systems you can bet your life on (mission critical) and those which provide predictable response and quality of service (reliable). This course can also be taken for academic credit as ECEA 5317, part of CU Boulder’s Master of Science in Electrical Engineering degree.

Download examples of mission critical systems